Dr. Theodore Omtzigt is the CEO and Founder of Stillwater Supercomputing, Inc. With a focus on enabling product teams to create and introduce award winning products, he has a proven track record of delivering goal-oriented innovations. Innovation: At Intel, he created and managed the first Platform Performance Engineering group chartered with engineering design optimizations among CPU, chipset, and GPU programs. As part of this effort, he invented Intel's Observation Architecture, a patented integrated diagnostic processor for the Intel platform, and his team successfully delivered hardware and software components to the chipset and graphics product teams that were fully functional on first silicon. Quality: At NVIDIA, he developed two performance validation systems, one for chipsets, the other for GPUs, that completely automated the data generation, collection, and reporting of design quality and performance metrics for final chip sign-off. These systems replaced error prone and resource intensive processes, consuming man years for each product, with autonomous processes that allowed performance validation to be run as part of the regular regression testing without manual intervention. Leading transformations: At Stillwater, Dr. Omtzigt has brought together a global team of entrepreneurs, technologists, and business leaders to build the next generation platform for knowledge processing to create adaptive, secure, scalable intelligent systems for business, healthcare, and mobility applications. This platform is based on the world's first distributed data flow machine, called the Stillwater Knowledge Processing Unit, or KPU(TM). Dr. Omtzigt has the rare ability to span multiple technologies and business processes to identify valuable business process improvement opportunities and possesses the technical depth and leadership that allows him to seize these opportunities.
Stillwater Supercomputing is developing a new high-productivity platform for real-time intelligence. Our first product is a genome assembler for bioinformatics. Full human genome at 40x coverage assembled in less than an hour.
Performance Engineering of next generation graphics platforms
Performance Engineering R&D of 3D graphics drivers and programmable pixel pipelines
Architect/micro-architect on the following products: Pentium PCI i430 chipsets: cache and MC design Pentium III: BIU and ROB Pentium II/III AGP i440 chipsets: AGP bus definition, MC design i740 GPU: Observation Architecture
Developed silicon compilation strategies for fine-grain parallel algorithms that span multiple chips.